Embodiments of the inventive concept described herein relate to a memory system including a nonvolatile memory device.
There is increasing demand for electrically erasable and programmable semiconductor memory devices without refresh of data stored therein. The trend is toward increasing storage capacity and integration of memory devices. An example of a nonvolatile memory device providing a large storage capacity and high level of integration without refresh of stored data is a NAND flash memory device. Since flash memory devices retain data even when power is off, they are widely used in electronic devices which commonly experience sudden interruptions in power (e.g., portable terminals, portable computers, etc.).
Data-retention characteristics and the number of program/erase cycles are closely associated with reliability and life span of nonvolatile memory devices having floating gate structures. Stored charge (electrons) may leak from a floating gate as a result of various types of failure, causing a threshold voltage to decrease. On the other hand, a floating gate slowly obtains electrons with a control gate maintained with a specific voltage. This means that a threshold voltage increases. Iteration of program/erase cycles forces an oxide film of a cell transistor to be stressed, causing failures, such as tunnel oxide breakdown of a cell transistor. In flash memory devices, program/erase endurance is mainly affected since charge is trapped within a tunnel oxide film during program and erase operations. Charge trap affects a threshold voltage window of the memory device or program/erase times of subsequent cycles.